PCB Tools
PCB Stackup Calculator Layer Stackup Designer
Pick a layer count and get a recommended, symmetrical stackup — signal / ground / power assignment, core & prepreg build, and total thickness — following controlled-impedance best practice, so you can plan your board before you order.
6-Layer Stackup
1.6 mm is the most common finished thickness.
- • Every signal layer sits next to a reference plane.
- • Symmetric build about the center — balanced for warp-free lamination.
- • Nominal planning values; AtlasPCB sets exact core/prepreg for your impedance.
Have your layer count and target impedance? Our engineers turn this into a production-ready stackup with exact core/prepreg.
Get Instant QuotePCB Stackup Design Rules
A good stackup is decided before routing, because it fixes the impedance, the return-current paths and the mechanical balance of the whole board. The recommended stackups this tool generates follow four rules that experienced layout engineers apply to every multilayer design.
Plane-adjacent signals
Every signal layer sits next to a solid ground or power plane so the return current has a tight, continuous path directly beneath the trace.
No adjacent signals
Two signal layers directly next to each other couple crosstalk and share a poorly-defined return. Separate them with a plane.
Symmetric build
Mirror the copper and dielectric about the center line so lamination stress is balanced — the board stays flat instead of bowing or twisting.
Impedance-driven dielectrics
Core and prepreg heights are chosen to hit your target trace impedance — change a thickness and every controlled-impedance width changes with it.
Standard 4 / 6 / 8 / 10-Layer Stackups
Proven starting arrangements (S = signal, GND = ground plane, PWR = power plane), symmetric about the center, on a ~1.6 mm 1 oz build. Use the calculator above to see the full per-layer stack, then let our engineers tune the exact dielectric heights to your impedance targets.
| Layers | Recommended arrangement | When to use |
|---|---|---|
| 4-layer | SIG · GND · PWR · SIG | Entry multilayer. Both signal layers reference an adjacent plane; good EMI and impedance control for most digital designs. |
| 6-layer | SIG · GND · SIG · PWR · GND · SIG | Adds an internal signal layer with a dedicated PWR/GND pair. Common for BGA fan-out and moderate high-speed routing. |
| 8-layer | SIG · GND · SIG · PWR · GND · SIG · PWR · SIG | Four signal layers, continuous reference planes, isolated power domains. FPGA/SoC and DDR-class designs. |
| 10-layer | SIG · GND · SIG · GND · PWR · GND · PWR · SIG · GND · SIG | More reference planes for cleaner return paths; dense high-speed and multi-rail power. |
Standard FR-4
TG150 / TG170 high-Tg cores & prepreg for most digital multilayer boards.
High-reliability
Isola 370HR (Tg 180°C) for lead-free assembly and IPC Class 3 thermal endurance.
Low-loss / high-speed
Megtron 6/7 on the critical SerDes layers for 56G/112G channels.
Turn this stackup into a real board.
Upload your design — we design the exact core/prepreg build for your impedance and TDR-verify it.
FAQ
PCB Stackup Calculator FAQs
What is a PCB stackup?
The ordered arrangement of copper layers and the dielectrics (core / prepreg) between them, plus each layer’s role (signal, ground, power) and thickness. It sets controlled impedance, signal integrity, EMI and mechanical rigidity, so it is defined before routing.
What is the best 4 / 6 / 8-layer stackup?
4-layer: Signal / GND / PWR / Signal. 6-layer: Signal / GND / Signal / PWR / GND / Signal. 8-layer: Signal / GND / Signal / PWR / GND / Signal / PWR / Signal. Keep every signal layer next to a plane, avoid adjacent signal layers, and keep the build symmetric.
Why must a stackup be symmetrical?
Symmetry about the center balances lamination and reflow stress. An asymmetric build bows and twists, failing flatness specs and hurting assembly yield. Copper coverage is balanced layer-to-layer for the same reason.
How thick is a standard multilayer PCB?
1.6 mm (0.063") is the most common finished thickness for 4–12 layer boards, hit by adjusting core and prepreg thicknesses to the layer count. 0.8–3.2 mm builds are available; higher layer counts at 1.6 mm use thinner cores/prepregs.
Does the stackup affect controlled impedance?
Completely — impedance depends on trace width, copper thickness, dielectric height to the reference plane and laminate Dk, all of which live in the stackup. AtlasPCB designs the exact build for your target impedance and TDR-verifies every controlled-impedance board.
From stackup plan to finished board
Send us your layer count and impedance targets. We design the production stackup, build it, and ship a measured report with every controlled-impedance order.